Has anyone figured out how to determine Genv(0) for the second problem? I was thinking.....
since vs1_hat = 2Vg*cos(pi*D/2)*d_hat..........we can say vs1_hat/d_hat *d_hat/v_hat
= 2*Vg*cos(pi*D/2)*Kpwm = vs1_hat/v_hat
But in the last homework it was more complicated with a partial derivative?
6 comments:
How about finding Genv(s) at s=0 ?
The way I am doing it is as Tanto said by setting s=0. This gives a complex number whose magnitude must be taken to get the value of Genv. So
Genv(0)=2Vgcos(pi*D)/2 * R/(R+jwsoL+1/jwsoC)
I hope I did this right.
Hello All,
After some thought, I think it might be solved either way:
1. Genv(s) set s=0
or
2. Like Brandon says,
ssgain = |d(Vs(t))/dD(t)|*d_hat/vi_hat * H(s=jws)
= 2*Vg*cos(pi*D/2) * Kpwm * R/(R+jwsoL+1/jwsoC)
H(s=jws)added to transform vs_hat to
v_hat, since ssgain = v_hat/vi_hat
Both ways, I get the same answer.
Tanto your right. Option 2 seems a little simplier since you already have |H(jwso)| in the text for the tank.
Hi every one
Can any one give me a hint to configure out the voltage across the capacitor (small-signal model of the capcitor), since it is a series tank.
Hello Hashim,
Slide # 31 of lecture note, give phasor equiv
circuit for capacitor:
http://ecee.colorado.edu/~ecen5817/notes/acmodeling/ResConvACslides.pdf
For small signal model of cap, you include all components as shown on the slide except j*C*V*ws_hat (open circuit). The reason is for problem # 2, switching freq isn't modulated.
For steady state circuit of cap, you just need to include 1/(j*wso*C).
Hope this help.
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